\doxysubsubsubsection{UART DMA Rx }
\hypertarget{group___u_a_r_t___d_m_a___rx}{}\label{group___u_a_r_t___d_m_a___rx}\index{UART DMA Rx@{UART DMA Rx}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___d_m_a___rx_gac65987cb4d8fd5da0f7dc695312f6afa}{UART\+\_\+\+DMA\+\_\+\+RX\+\_\+\+DISABLE}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___d_m_a___rx_gab871994de6d36a02b8ec34af197dff1d}{UART\+\_\+\+DMA\+\_\+\+RX\+\_\+\+ENABLE}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\+\_\+\+CR3\+\_\+\+DMAR}}
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___u_a_r_t___d_m_a___rx_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___u_a_r_t___d_m_a___rx_gac65987cb4d8fd5da0f7dc695312f6afa}\index{UART DMA Rx@{UART DMA Rx}!UART\_DMA\_RX\_DISABLE@{UART\_DMA\_RX\_DISABLE}}
\index{UART\_DMA\_RX\_DISABLE@{UART\_DMA\_RX\_DISABLE}!UART DMA Rx@{UART DMA Rx}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_DMA\_RX\_DISABLE}{UART\_DMA\_RX\_DISABLE}}
{\footnotesize\ttfamily \label{group___u_a_r_t___d_m_a___rx_gac65987cb4d8fd5da0f7dc695312f6afa} 
\#define UART\+\_\+\+DMA\+\_\+\+RX\+\_\+\+DISABLE~0x00000000U}

UART DMA RX disabled \Hypertarget{group___u_a_r_t___d_m_a___rx_gab871994de6d36a02b8ec34af197dff1d}\index{UART DMA Rx@{UART DMA Rx}!UART\_DMA\_RX\_ENABLE@{UART\_DMA\_RX\_ENABLE}}
\index{UART\_DMA\_RX\_ENABLE@{UART\_DMA\_RX\_ENABLE}!UART DMA Rx@{UART DMA Rx}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_DMA\_RX\_ENABLE}{UART\_DMA\_RX\_ENABLE}}
{\footnotesize\ttfamily \label{group___u_a_r_t___d_m_a___rx_gab871994de6d36a02b8ec34af197dff1d} 
\#define UART\+\_\+\+DMA\+\_\+\+RX\+\_\+\+ENABLE~\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\+\_\+\+CR3\+\_\+\+DMAR}}}

UART DMA RX enabled 